The present invention relates to semiconductor integrated circuits and their manufacture. More particularly, the invention relates to a technique for forming an insulating layer between a lower conductive layer and an upper conductive layer in a dynamic random access memory (DRAM) device. But it will be recognized that the invention has a wider range of applicability. Merely by way of example, the invention may be applied in the manufacture of other semiconductor devices and conductive layers made of materials such as polysilicon, aluminum, titanium, tungsten, silicide, and others.
Industry utilizes or has proposed techniques for fabrication of an insulating layer (or inter-layer dielectric) between conductive layers in a DRAM process. Fabrication steps generally include applying a first polysilicon layer (poly-1), depositing an insulating layer using low pressure chemical vapor deposition (LPCVD) overlying the first polysilicon layer, and then applying a second polysilicon layer (poly-2) overlying the insulating layer.
Despite recent advances in deposition techniques, insulating layer thickness is still difficult to control, especially for devices have smaller line widths such as those with sub-micron features. For example, an insulating layer that is too thick often causes alignment and etching problems in subsequent steps. Alternatively, an insulating layer that is too thin often creates isolation problems (e.g., short circuit) between the first and the second polysilicon layers.
Other limitations with the conventional insulating layer can include a high water-absorbability, a high etching rate, and a high shrinkage rate. These limitations often occur by way of insulating layers fabricated using an LPCVD technique. High water-absorbability promotes uncontrollable etching, that is, etching that produces a non-uniform layer. High shrinkage rate causes undesired stress on surfaces of the device which affects device performance and reliability.
A further limitation with the conventional insulating layer deposited by LPCVD is stringers in certain areas of the cell structure, which is due predominantly to the fully conformal characteristic of the LPCVD film. That is, the fully conformal film creates an upper surface profile characterized by gaps and voids thereon. The stringers are formed in these gaps and voids.
From the above it is seen that a method of fabricating an inter-layer dielectric that is easy, reliable, consistent, and cost effective is often desired.